原型驗證方案

PCIe Gen4 X4 (Host) Board

IO Translator Borad

．96*Level Shift IO 1.8V/2.5V/3.3V，
．32 HP I/O，
．DIP Switch 8 PIN，
．Push Button *2，
．LED*8

Display Port 1.4 Board

**supports 4 lanes of 1.62Gbps, 2. 7Gbps 5. 4Gbps, and 8. 1Gbps
•Displayport TX
。(One port) - DP1.4_8Gbps
。One port with four lanes
。Control Pins with jumpers
•Displayport RX
。(One port) - DP1.4_ 8Gbps
。One port with four lanes
。Support one RX port at a time
。Control Pins with jumpers

FMC Board

USB2.0 PHY Board (MICROCHIP)
TYPE-A (USB3250)
-Power IN: 5V
-Single Port 480Mbps USB2.0: UTMI Controller
-Reference clock: crystal 12MHz
-Support Host / Device Mode
-PHY reset button *1

USB3.0 PHY Board TYPE-A (TUSB1310ZAY)

-Power IN: 5V
-Single Port 5.0-Gbps USB3.0: PIPE / ULPI Controller
-Reference clock: crystal 25MHz
-Support Host / Device Mode
-PHY reset button *1
-User LED *3

DDR3 SODIMM Board

DDR4 SODIMM Board

Ethernet Phy Board

SFP Board

．12 Port

SD Card

MIPI D-PHY Board

MIPI TX PORT *1 (MIPI PHY CHIP MC20902)
MIPI RX PORT *1 (MIPI PHY CHIP MC20901)

Reserve IO *79 (Directly connected to FPGA) Reserve IO *24 (Connected to FPGA through Level Shifter, can be set to 1.8V, 2.5V, 3.3V) Total Reserve IO *103

Reserve 5V Power: 2 Pin Header